ESD protection SCR device
US9991369B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 5, 2017 |
| Grant date | Jun 5, 2018 |
| Priority date | — |
| Expiry date | Sep 5, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/106
Abstract
An ESD protection SCR device includes a semiconductor substrate, an epitaxial layer, device isolation layers, an n-type well formed in an anode region, a first high concentration p-type impurity region formed on a surface portion of the n-type well, a first high concentration n-type impurity region formed on the surface portion of the n-type well, a p-type well formed in an cathode region, a second high concentration n-type impurity region formed on a surface portion of the p-type well, a second high concentration p-type impurity region formed on a surface portion of the p-type well so as to be spaced apart from the second high concentration n-type impurity region, and a third high-concentration p-type impurity region formed on the surface portion of the p-type well so as to surround a side portion of the second high-concentration n-type impurity region, adjacent to the anode region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.