FIFO memory having a memory region modifiable during operation
US9996318B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 18, 2016 |
| Grant date | Jun 12, 2018 |
| Priority date | — |
| Expiry date | Oct 22, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2205/126
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A FIFO memory having a modifiable memory region; the FIFO memory being configured as a linear memory and as a circular buffer; the FIFO memory having a state machine that contains a new base value and a new top value for definition of a memory region allocated in the future, the lower boundary of which region is defined by the new base value and the upper boundary of which is defined by the new top value, and the state machine is configured in such a way that in a read mode and/or a write mode of the FIFO memory, the allocated memory region of the FIFO memory is modifiable by shifting the base pointer to the new base value, and/or by shifting the top pointer to the new top value.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.