Patent · US Active

NLDMOS device and method for manufacturing the same

US9997626B2 · kind B2 · utility

3Cited by
4References
17Claims
0Family size

Assignee

Inventors

Key dates

Filing dateDec 29, 2015
Grant dateJun 12, 2018
Priority date
Expiry dateDec 29, 2035

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D64/516

Abstract

An NLDMOS device that includes a drift region, a P well, and a first PTOP layer and a second PTOP layer formed on the drift region, wherein the first PTOP layer has the same lateral size with the second PTOP layer, the first PTOP layer is spaced from the second PTOP layer in the longitudinal direction and located on the bottom of the second PTOP layer, with the depth of the first PTOP layer less than or equal to that of the bottom of the P well. The present invention also discloses a method for manufacturing the NLDMOS device.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.