3D integrated thermoelectric generator operating in an out-of-plane heat flux configuration with internal voids and heat conduction paths conditioning vias
US9997691B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 27, 2017 |
| Grant date | Jun 12, 2018 |
| Priority date | — |
| Expiry date | Mar 27, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N10/8556
Abstract
Dices of integrated Z-device structures on a substrate wafer of a 3D integrated thermo-electric generator (iTEG) may be stacked in a tri-dimensional heterogeneous integration mode, without or with interposer wafer dices, in coherent thermal coupling among them. Through silicon vias (TSVs) holes through the thickness of the semiconductor crystal of substrate of the dices of integrated Z-device structures in geometrical projection correspondence with valley bottom metal junction contacts, and through silicon vias (TSVs) holes through the thickness of the semiconductor crystal of interposer dices, in geometrical projection correspondence with the hill-top metal junction contacts of the coupled Z-device structures, have a copper or other good heat conductor filler, form low thermal resistance heat conduction paths through the stacked Z-device structures. Thermoelectrically generated current is gathered from every integrated Z-device of a multi-tier iTEG operating in an out-of-plane heat flux configuration.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.