Low inductivity circuit arrangement of an inverter
US9998028B2 · kind B2 · utility
1Cited by
2References
14Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 6, 2017 |
| Grant date | Jun 12, 2018 |
| Priority date | — |
| Expiry date | Feb 6, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH02M7/217
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
The invention relates to a circuit arrangement of a phase leg of a three-point converter. A circuit arrangement of a three-point converter is provided that is optimised with regard to the suppression of parasitic inductance, and at the same time has a compact simple construction, so that the converter can be incorporated in a electrical enclosure in a space-saving and installation friendly manner.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.