Power-efficient successive-approximation analog-to-digital converter using LSB averaging
US9998137B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 17, 2017 |
| Grant date | Jun 12, 2018 |
| Priority date | — |
| Expiry date | Sep 17, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/468
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An Analog-to-Digital Converter (ADC) device includes an input interface and conversion circuitry. The input interface is configured to receive an analog input signal. The conversion circuitry is configured to convert the analog input signal into a digital word by performing a sequence of iterations to determine respective bits of the digital word, wherein the sequence (i) progresses in descending order of bit significance of the bits, from a Most Significant Bit (MSB) to a Least Significant Bit (LSB), and (ii) repeats evaluation of a predefined number of Least-Significant Bits (LSBs) of the digital word multiple times, and determining a final value of the digital word by averaging the repeatedly-evaluated LSBs.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.