Coherent sampled readout circuit and signal processor for a charge coupled device array

USRE30087E · kind E · reissue

Assignee

• Westinghouse Electric Company LLC · US

Inventors

• Marvin H. White · Laurel, US
• David H McCann · Ellicott City, US
• Ingham A. G. Mack · Laurel, US
• Franklyn C. Blaha · Glen Burnie, US

Key dates

• Filing date: Dec 18, 1975
• Grant date: Aug 28, 1979
• Expiry date: Dec 18, 1995

Classification

• Technology area (CPC —): General

Abstract

A coherent sampled CMOS readout circuit and signal processor coupled to a CCD shift register operated by a two-phase minority carrier transfer clock system. The invention comprises a multiplex MIS switch, a reverse biased collection diode, an N channel MOSFET reset switch, a P channel MOSFET electrometer amplifier, and a sample and hold circuit, the configuration having four distinct operational timing subintervals within a clock period wherein the charge is shifted from one shift register bit to another and finally to the output bit. This removes the Nyquist noise associated with the reset switch, suppresses switching transients and 1/f surface noise to thereby improve the signal to noise ratio, i.e., dynamic range, for a CCD array and readout system.