MOS battery backup controller for microcomputer random access memory
USRE32200E · kind E · reissue
Assignee
Inventors
Key dates
| Filing date | Mar 5, 1984 |
| Grant date | Jul 8, 1986 |
| Priority date | — |
| Expiry date | Mar 5, 2004 |
Classification
- Technology area (CPC —)General
Abstract
MOS Control circuitry for incorporation on a microcomputer IC chip for assuring adequate power to maintain the data in an associated static random access memory. A rechargeable battery provides standby power, and the voltage level of the battery is compared with the microcomputer V.sub.cc supply. Whenever V.sub.cc drops below a predetermined level, such as the standby battery voltage level, the circuitry disconnects the V.sub.cc from the memory input power and replaces it with standby battery power. When V.sub.cc is returned to the system, a gate applies a trickle charge to the battery.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.