Dual channel readback recovery system
USRE38360E1 · kind E1 · reissue
1Cited by
4References
16Claims
0Family size
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Key dates
| Filing date | Apr 28, 1999 |
| Grant date | Dec 23, 2003 |
| Priority date | — |
| Expiry date | Apr 28, 2019 |
Classification
- Technology area (CPC —)General
Abstract
A dual channel readback recovery circuit includes a high resolution channel and a low resolution channel and a data latch. A logical filter in one or both channels rejects signals that are followed by other signals if they are spaced apart less than the rejection time interval allowed by the code used. Polarity qualifying logic rejects signals in the channels that are not matched in polarity.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.