Semiconductor device and method of fabricating same
USRE41866E1 · kind E1 · reissue
3Cited by
6References
22Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 27, 2001 |
| Grant date | Oct 26, 2010 |
| Priority date | — |
| Expiry date | Jun 27, 2021 |
Classification
- Technology area (CPC —)General
Abstract
There is disclosed a semiconductor device having an MOS gate for reducing variations in threshold voltage (Vth) with time wherein a surface protective film is not formed in a device area including channels but only in a device peripheral area, thereby reducing the amount of hydrogen atoms migrating to a silicon-silicon oxide interface in a cell area and, accordingly, reducing the number of Si—H chemical bonds at the interface.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.