Processes for manufacturing printed wiring boards
USRE45637E1 · kind E1 · reissue
Assignee
Inventor
Key dates
| Filing date | Jun 8, 2012 |
| Grant date | Jul 28, 2015 |
| Priority date | — |
| Expiry date | Jun 8, 2032 |
Classification
- Technology area (CPC —)General
Abstract
Methods of manufacturing printed wiring boards including electrically conductive constraining cores that involve a single lamination cycle are disclosed. One example of the method of the invention includes drilling a clearance pattern in an electrically conductive constraining core, arranging the electrically conductive constraining core in a stack up that includes B-stage (semi-cured) layers of dielectric material on either side of the constraining core and additional layers of material arranged to form the at least one functional layer, performing a lamination cycle on the stack up that causes the resin in the B-stage (semi-cured) layers of dielectric to reflow and fill the clearance pattern in the electrically conductive constraining core before curing and drilling plated through holes.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.