Secure transaction microcontroller with secure boot loader
USRE47621E1 · kind E1 · reissue
Assignee
Inventors
Key dates
| Filing date | Jun 22, 2016 |
| Grant date | Sep 24, 2019 |
| Priority date | — |
| Expiry date | Jun 22, 2036 |
Classification
- Technology area (CPC —)General
Abstract
A high security microcontroller (such as in a point of sale terminal) includes tamper control circuitry for detecting vulnerability conditions: a write to program memory before the sensitive financial information has been erased, a tamper detect condition, the enabling of a debugger, a power-up condition, an illegal temperature condition, an illegal supply voltage condition, an oscillator fail condition, and a battery removal condition. If the tamper control circuitry detects a vulnerability condition, then the memory where the sensitive financial information could be stored is erased before boot loader operation or debugger operation can be enabled. Upon power-up if a valid image is detected in program memory, then the boot loader is not executed and secure memory is not erased but rather the image is executed. The tamper control circuitry is a hardware state machine that is outside control of user-loaded software and is outside control of the debugger.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.