Memory for programming a floating gate using an analog comparison device coupled to a tunneling device
USRE47900E1 · kind E1 · reissue
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Key dates
| Filing date | Apr 8, 2016 |
| Grant date | Mar 10, 2020 |
| Priority date | — |
| Expiry date | Apr 8, 2036 |
Classification
- Technology area (CPC —)General
Abstract
The present invention provides circuits, systems, and methods for programming a floating gate. As described herein, a floating gate tunneling device is used with an analog comparison device in a circuit having a floating reference node and an offset-mitigating feedback loop for iteratively programming a floating gate or multiple floating gates.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.