Semiconductor device and method for manufacturing the same

USRE47988E1 · kind E1 · reissue

Assignee

• LONGITUDE LICENSING LIMITED · IE

Inventors

• Yoshitaka Nakamura · Tokyo, JP
• Kenji Komeda · Tokyo, JP
• Ryota Suewaka · Nagasaki, JP
• Noriaki Ikeda · Nagaoka, JP

Key dates

• Filing date: May 28, 2018
• Grant date: May 12, 2020
• Expiry date: May 28, 2038

Classification

• Technology area (CPC —): General

Abstract

A semiconductor device comprises a memory cell region, a peripheral circuit region and a boundary region. In the memory cell region, a concave lower electrode and a foundation layer have a same uppermost surface positioned in a height of H above the plane-A. In the boundary region, one concave lower conductive region and a foundation layer have a same uppermost surface positioned in a height of H above the plane-A.