Patent · US Active

Non-volatile semiconductor storage device

USRE50512E1 · kind E1 · reissue

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13References
13Claims
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Assignee

Inventors

Key dates

Filing dateSep 21, 2022
Grant dateJul 29, 2025
Priority date
Expiry dateSep 21, 2042

Classification

  • Technology area (CPC —)General

Abstract

A non-volatile semiconductor storage device includes: a memory cell array having memory cells arranged therein, the memory cells storing data in a non-volatile manner; and a plurality of transfer transistors transferring a voltage to the memory cells, the voltage to be supplied for data read, write and erase operations with respect to the memory cells. Each of the transfer transistors includes: a gate electrode formed on a semiconductor substrate via a gate insulation film; and diffusion layers formed to sandwich the gate electrode therebetween and functioning as drain/source layers. Upper layer wirings are provided above the diffusion layers and provided with a predetermined voltage to prevent depletion of the diffusion layers at least when the transfer transistors become conductive.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.