Integrated circuit layout utilizing separated active circuit and wiring regions
UST100501I4 · kind I4 · defensive publication
6Cited by
0References
1Claims
0Family size
Inventors
Key dates
| Filing date | Jul 17, 1979 |
| Grant date | Apr 7, 1981 |
| Priority date | — |
| Expiry date | Jul 17, 1999 |
Classification
- Technology area (CPC —)General
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.