Integrated circuit layout utilizing separated active circuit and wiring regions
UST101804I4 · kind I4 · defensive publication
5Cited by
0References
1Claims
0Family size
Inventors
Key dates
| Filing date | May 5, 1980 |
| Grant date | May 4, 1982 |
| Priority date | — |
| Expiry date | May 5, 2000 |
Classification
- Technology area (CPC —)General
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.