Inventor · South Burlington, VT, US

Anthony Parent

1Patents
1h-index
3Co-inventors
25Inventor score

Filing activity: Jan 3, 2012 → Jan 3, 2012

Most-cited inventions

PatentTitleAreaCited byStatus
US8631376B2 Method and system for generating a placement layout of a VLSI circuit design Physics 1 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.