Cheng Wang
55Patents
9h-index
39Co-inventors
74Inventor score
Filing activity: Sep 30, 2005 → May 23, 2023
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US8001421B2 | Compiler technique for efficient register checkpointing to support transaction roll-back | Physics | 78 | Active |
| US7757221B2 | Apparatus and method for dynamic binary translator to support precise exceptions with minimal optimization constraints | Physics | 19 | Active |
| US7506217B2 | Apparatus and method for software-based control flow checking for soft error detection to improve microprocessor reliability | Physics | 17 | Active |
| US9146844B2 | Apparatus, method, and system for providing a decision mechanism for conditional commits in an atomic region | Physics | 15 | Active |
| US8549504B2 | Apparatus, method, and system for providing a decision mechanism for conditional commits in an atomic region | Physics | 15 | Active |
| US8683243B2 | Dynamic core selection for heterogeneous multi-core systems | Emerging Cross-Sectional Technologies | 15 | Active |
| US8296749B2 | Program translation and transactional memory formation | Physics | 13 | Active |
| US9710280B2 | Overlapping atomic regions in a processor | Physics | 11 | Active |
| US7865885B2 | Using transactional memory for precise exception handling in aggressive dynamic binary optimizations | Physics | 9 | Active |
| US9152417B2 | Expediting execution time memory aliasing checking | Physics | 9 | Active |
| US8132158B2 | Mechanism for software transactional memory commit/abort in unmanaged runtime environment | Physics | 8 | Active |
| US7694281B2 | Two-pass MRET trace selection for dynamic optimization | Physics | 8 | Active |
| US7802136B2 | Compiler technique for efficient register checkpointing to support transaction roll-back | Physics | 7 | Active |
| US10268497B2 | Conjugate code generation for efficient dynamic optimizations | Physics | 6 | Active |
| US8060482B2 | Efficient and consistent software transactional memory | Physics | 6 | Active |
| US8935678B2 | Methods and apparatus to form a resilient objective instruction construct | Physics | 6 | Active |
| US8522223B2 | Automatic function call in multithreaded application | Physics | 6 | Active |
| US9715376B2 | Energy/performance with optimal communication in dynamic parallelization of single threaded programs | Physics | 6 | Active |
| US7937621B2 | Transient fault detection by integrating an SRMT code and a non SRMT code in a single application | Physics | 6 | Active |
| US10489158B2 | Processors, methods, systems, and instructions to selectively fence only persistent storage of given data relative to subsequent stores | Physics | 5 | Active |
| US9817644B2 | Apparatus, method, and system for providing a decision mechanism for conditional commits in an atomic region | Physics | 5 | Active |
| US8706982B2 | Mechanisms for strong atomicity in a transactional memory system | Physics | 5 | Active |
| US9501135B2 | Dynamic core selection for heterogeneous multi-core systems | Emerging Cross-Sectional Technologies | 4 | Active |
| US8443343B2 | Context-sensitive slicing for dynamically parallelizing binary programs | Physics | 4 | Active |
| US7844946B2 | Methods and apparatus to form a transactional objective instruction construct from lock-based critical sections | Physics | 4 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.