Overlapping atomic regions in a processor
US9710280B2 · kind B2 · utility
11Cited by
2References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 30, 2011 |
| Grant date | Jul 18, 2017 |
| Priority date | — |
| Expiry date | May 7, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/528
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In one embodiment, the present invention includes a processor having a core to execute instructions. This core can include various structures and logic that enable instructions of different atomic regions to be executed in an overlapping manner. To this end, the core can include a register file having registers to store data for use in execution of the instructions, and multiple shadow register files each to store a register checkpoint on initiation of a given atomic region. In this way, overlapping execution of atomic regions identified by a programmer or compiler can occur. Other embodiments are described and claimed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.