Chul-Hyun Lim
4Patents
2h-index
8Co-inventors
37Inventor score
Filing activity: Oct 3, 2013 → Jan 12, 2023
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US9508796B2 | Internal spacers for nanowire transistors and method of fabrication thereof | Electricity | 8 | Active |
| US9935205B2 | Internal spacers for nanowire transistors and method of fabrication thereof | Electricity | 2 | Active |
| US11594448B2 | Vertical edge blocking (VEB) technique for increasing patterning process margin | Electricity | 0 | Active |
| US12249541B2 | Vertical edge blocking (VEB) technique for increasing patterning process margin | Electricity | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.