Daniel J. Flees
2Patents
2h-index
8Co-inventors
37Inventor score
Filing activity: Dec 19, 2002 → Jan 28, 2015
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6799308B2 | Timing analysis of latch-controlled digital circuits with detailed clock skew analysis | Physics | 19 | Expired |
| US9672305B1 | Method for gating clock signals using late arriving enable signals | Emerging Cross-Sectional Technologies | 4 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.