Inventor · Bengaluru, IN

Devadatta Bhat

1Patents
1h-index
9Co-inventors
25Inventor score

Filing activity: Apr 1, 2015 → Apr 1, 2015

Most-cited inventions

PatentTitleAreaCited byStatus
US9711241B2 Method and apparatus for optimized memory test status detection and debug Physics 1 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.