Dharani Kotte
8Patents
3h-index
5Co-inventors
36Inventor score
Filing activity: Jul 3, 2014 → May 22, 2015
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US9507711B1 | Hierarchical FTL mapping optimized for workload | Physics | 6 | Active |
| US10162748B2 | Prioritizing garbage collection and block allocation based on I/O history for logical address regions | Physics | 5 | Active |
| US10656840B2 | Real-time I/O pattern recognition to enhance performance and endurance of a storage device | Physics | 3 | Active |
| US9703491B2 | Using history of unaligned writes to cache data and avoid read-modify-writes in a non-volatile storage device | Physics | 3 | Active |
| US10656842B2 | Using history of I/O sizes and I/O sequences to trigger coalesced writes in a non-volatile storage device | Physics | 3 | Active |
| US10114557B2 | Identification of hot regions to enhance performance and endurance of a non-volatile storage device | Physics | 2 | Active |
| US10146448B2 | Using history of I/O sequences to trigger cached read ahead in a non-volatile storage device | Physics | 2 | Active |
| US10372613B2 | Using sub-region I/O history to cache repeatedly accessed sub-regions in a non-volatile storage device | Physics | 1 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.