Gideon Gerzon
38Patents
6h-index
64Co-inventors
68Inventor score
Filing activity: Mar 30, 2007 → Dec 16, 2022
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US9116869B2 | Posting interrupts to virtual processors | Physics | 20 | Active |
| US8566492B2 | Posting interrupts to virtual processors | Physics | 11 | Active |
| US8230203B2 | Detecting spin loops in a virtual machine environment | Physics | 9 | Active |
| US10664179B2 | Processors, methods and systems to allow secure communications between protected container memory and input/output devices | Physics | 8 | Active |
| US8468365B2 | Tweakable encryption mode for memory encryption with protection against replay attacks | Physics | 8 | Active |
| US8910158B2 | Virtualizing interrupt priority and delivery | Physics | 7 | Active |
| US10657071B2 | System, apparatus and method for page granular, software controlled multiple key memory encryption | Physics | 6 | Active |
| US10671737B2 | Cryptographic memory ownership table for secure public cloud | Physics | 5 | Active |
| US10181946B2 | Cryptographic protection of I/O data for DMA capable I/O controllers | Physics | 4 | Active |
| US11403005B2 | Cryptographic memory ownership | Electricity | 3 | Active |
| US8843683B2 | Posting interrupts to virtual processors | Physics | 3 | Active |
| US9015835B2 | Systems and methods for procedure return address verification | Physics | 3 | Active |
| US9183161B2 | Apparatus and method for page walk extension for enhanced security checks | Physics | 3 | Active |
| US11139967B2 | Restricting usage of encryption keys by untrusted software | Physics | 2 | Active |
| US10838722B2 | Restartable cache write-back and invalidation | Physics | 2 | Active |
| US10303900B2 | Technologies for secure programming of a cryptographic engine for trusted I/O | Electricity | 2 | Active |
| US10437990B2 | Detection of return oriented programming attacks in a processor | Physics | 2 | Active |
| US11520906B2 | Cryptographic memory ownership table for secure public cloud | Physics | 1 | Active |
| US9892069B2 | Posting interrupts to virtual processors | Physics | 1 | Active |
| US9286235B2 | Virtual memory address range register | Physics | 1 | Active |
| US11531475B2 | Processors, methods and systems to allow secure communications between protected container memory and input/output devices | Physics | 1 | Active |
| US11687654B2 | Providing isolation in virtualized systems using trust domains | Physics | 1 | Active |
| US12021980B2 | Restricting usage of encryption keys by untrusted software | Physics | 0 | Active |
| US11422811B2 | Restartable cache write-back and invalidation | Physics | 0 | Active |
| US12141450B2 | Processors, methods and systems to allow secure communications between protected container memory and input/output devices | Physics | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.