Inventor · Greater Noida, IN

Himanshu

1Patents
1h-index
2Co-inventors
22Inventor score

Filing activity: Apr 18, 2019 → Apr 18, 2019

Most-cited inventions

PatentTitleAreaCited byStatus
US10802077B1 Test circuit for dynamic checking for faults on functional and BIST clock paths to memory in both ATPG and LBIST modes Physics 6 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.