Jack Bourne
3Patents
1h-index
13Co-inventors
37Inventor score
Filing activity: Oct 15, 2013 → Oct 3, 2022
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US9095054B1 | High temperature equalized electrical parasitic power packaging method for many paralleled semiconductor power devices | Electricity | 9 | Active |
| USD1042421S1 | Communication device | General | 1 | Active |
| USD995500S1 | Communication device | General | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.