Inventor · Plaisir, FR

Jacques Abily

2Patents
2h-index
3Co-inventors
37Inventor score

Filing activity: Nov 12, 1997 → Jun 4, 2008

Most-cited inventions

PatentTitleAreaCited byStatus
US7941771B2 Method for functional verification of an integrated circuit model for constituting a verification platform, equipment emulator and verification platform Physics 7 Active
US6240491A Process and system for switching between an update and invalidate mode for each cache block Physics 5 Expired

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.