Inventor · Santa Clara, CA, US

Jaybharat Boddu

2Patents
2h-index
6Co-inventors
30Inventor score

Filing activity: Jun 6, 1996 → Jan 12, 1999

Most-cited inventions

PatentTitleAreaCited byStatus
US5884100A Low-latency, high-throughput, integrated cache coherent I/O system for a single-chip processor Physics 66 Expired
US6553435B1 DMA transfer method for a system including a single-chip processor with a processing core and a device interface in different clock domains Physics 12 Expired

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.