Inventor · Danville, CA, US

Jeffrey Lin

3Patents
3h-index
6Co-inventors
43Inventor score

Filing activity: Feb 29, 1996 → May 7, 2008

Most-cited inventions

PatentTitleAreaCited byStatus
US5703827A Method and structure for generating a boosted word line voltage and a back bias voltage for a memory array Physics 21 Expired
US5805509A Method and structure for generating a boosted word line voltage and back bias voltage for a memory array Physics 17 Expired
US8185242B2 Dynamic alignment of wafers using compensation values obtained through a series of wafer movements Electricity 9 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.