John L. Seabury
15Patents
7h-index
23Co-inventors
66Inventor score
Filing activity: Jan 27, 1987 → May 20, 2016
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US4864511A | Automated cartridge system | Physics | 104 | Expired |
| US6950967B1 | Method and apparatus for manufacture test processing a disk drive installed in a computer system | Physics | 67 | Expired |
| US8862969B2 | Memory quality monitor based compensation method and apparatus | Physics | 25 | Active |
| US7623313B1 | Method and apparatus for performing a self-servo write operation in a disk drive | Physics | 23 | Expired |
| US8499227B2 | Memory quality monitor based compensation method and apparatus | Physics | 15 | Active |
| US8595415B2 | At least semi-autonomous modules in a memory system and methods | Physics | 14 | Active |
| US7404131B2 | High efficiency, error minimizing coding strategy method and apparatus | Electricity | 13 | Expired |
| US8627165B2 | Bitwise operations and apparatus in a multi-level system | Electricity | 6 | Active |
| US7499234B1 | Method and apparatus for modifying spiral profile using reference tracks written onto a disk surface of a disk drive | Physics | 6 | Expired |
| US8990644B2 | Apparatus and methods of programming memory cells using adjustable charge state level(s) | Physics | 1 | Active |
| US9081717B2 | Memory quality monitor based compensation method and apparatus | Physics | 1 | Active |
| US9336083B2 | Apparatus and methods of programming memory cells using adjustable charge state level(s) | Physics | 0 | Active |
| US10355815B2 | Bitwise operations and apparatus in a multi-level system | Electricity | 0 | Active |
| USRE43883E1 | High efficiency, error minimizing coding strategy method and apparatus | General | 0 | Active |
| US9374343B2 | Bitwise operations and apparatus in a multi-level system | Electricity | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.