Inventor · Ottawa, ON, CA

John Pillar

25Patents
9h-index
28Co-inventors
75Inventor score

Filing activity: Apr 25, 1996 → Apr 22, 2022

Most-cited inventions

PatentTitleAreaCited byStatus
US6438106B1 Inter-class schedulers utilizing statistical priority guaranteed queuing and generic cell-rate algorithm priority guaranteed queuing Electricity 125 Expired
US5991268A Flow control mechanism of ABR traffic in ATM networks Electricity 46 Expired
US5825770A Multiple algorithm processing on a plurality of digital signal streams via context switching Physics 23 Expired
US6501762B1 Scheduler implementing weighted fair queuing by a weight limited first in-first out methodology Electricity 15 Expired
US6331970A Dynamic generic cell rate algorithm for policing ABR traffic Electricity 12 Expired
US6201755A Method and system for storing and retrieving information in a communications node Electricity 12 Expired
US6345037B2 Method and apparatus for auto detection of AAL5 type frames Electricity 11 Expired
US7882257B2 Stream processing node Electricity 11 Active
US5878044A Data transfer method and apparatus Electricity 9 Expired
US7388837B1 Multi-flow multi-level leaky bucket policer Electricity 8 Expired
US8001602B2 Data scan mechanism Physics 7 Active
US6625120B1 Method and apparatus for auto detection of AAL5 type frames for VCC and VPC switches Electricity 6 Expired
US6971058B2 Method and apparatus for finding variable length data patterns within a data stream Physics 6 Expired
US8156265B2 Data processor coupled to a sequencer circuit that provides efficient scalable queuing and method Physics 3 Active
US7872969B2 Method and apparatus for auto detection of AAL5 type frames for VCC and VPC switches Electricity 0 Expired
US11637784B2 Method and system for effective use of internal and external memory for packet buffering within a network device Electricity 0 Active
US9733981B2 System and method for conditional task switching during ordering scope transitions Physics 0 Active
US9785473B2 Configurable per-task state counters for processing cores in multi-tasking processing systems Physics 0 Active
US12267153B2 Frame scheduling based on an estimated direct memory access (DMA) latency and apparatus for time aware frame scheduling Electricity 0 Active
US8774191B2 Method and apparatus for auto detection of AAL5 type frames for VCC and VPC switches Electricity 0 Active
US9437299B2 Systems and methods for order scope transitions using cam Physics 0 Active
US10146820B2 Systems and methods to access memory locations in exact match keyed lookup tables using auxiliary keys Physics 0 Active
US11924102B2 Minimizing deviation from average latency of table lookups Physics 0 Active
US9680605B2 Method of offloading cyclic redundancy check on portions of a packet Electricity 0 Active
US10379899B2 Systems and methods for frame presentation and modification in a networking environment Physics 0 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.