Configurable per-task state counters for processing cores in multi-tasking processing systems
US9785473B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 14, 2014 |
| Grant date | Oct 10, 2017 |
| Priority date | — |
| Expiry date | Dec 10, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/4843
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Configurable per-task state counters for processing cores in multi-tasking processing systems are disclosed along with related methods. In part, the disclosed embodiments include a work scheduler and a plurality of processing cores. The work scheduler assigns tasks to the processing cores, and the processing cores concurrently process multiple assigned tasks using a plurality of processing states. Further, task state counters are provided for each assigned task, and these task state counters are incremented for each cycle that the task stays within selected processing states to generate per-task state count values for the assigned tasks. These per-task state count values are reported back to the work scheduler when processing for the task ends. The work scheduler can then use one or more of the per-task state count values to adjust how new tasks are assigned to the processing cores.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.