Keith Robert Pflederer
14Patents
2h-index
32Co-inventors
54Inventor score
Filing activity: Dec 29, 2003 → Nov 16, 2023
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US7159046B2 | Method and apparatus for configuring communication between devices in a computer system | Physics | 13 | Expired |
| US9287893B1 | ASIC block for high bandwidth LZ77 decompression | Electricity | 3 | Active |
| US7376775B2 | Apparatus, system, and method to enable transparent memory hot plug/remove | Physics | 2 | Expired |
| US8055851B2 | Line swapping scheme to reduce back invalidations in a snoop filter | Physics | 1 | Active |
| US12380019B2 | System memory address decoding for interleaving addresses across physical regions of a system-on-chip (SOC) and across shared memory resources in a processor-based system | Physics | 0 | Active |
| US11829637B2 | Methods and systems for memory bandwidth control | Physics | 0 | Active |
| US8769295B2 | Computing system feature activation mechanism | Physics | 0 | Active |
| US11789645B2 | Methods and systems for memory bandwidth control | Physics | 0 | Active |
| US11620243B2 | Way partitioning for a system-level cache | Emerging Cross-Sectional Technologies | 0 | Active |
| US10474385B2 | Managing memory fragmentation in hardware-assisted data compression | Physics | 0 | Active |
| US10884959B2 | Way partitioning for a system-level cache | Emerging Cross-Sectional Technologies | 0 | Active |
| US11899964B2 | Methods and systems for memory bandwidth control | Physics | 0 | Active |
| US11741028B1 | Efficiently striping ordered PCIe writes across multiple socket-to-socket links | Physics | 0 | Active |
| US7962694B2 | Partial way hint line replacement algorithm for a snoop filter | Physics | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.