Inventor · Rochester, MN, US

Lance R. Meyer

4Patents
1h-index
3Co-inventors
33Inventor score

Filing activity: Oct 26, 2005 → Dec 4, 2012

Most-cited inventions

PatentTitleAreaCited byStatus
US7747414B2 Run-Time performance verification system Physics 2 Active
US7324922B2 Run-time performance verification system Physics 1 Expired
US8607175B1 Identifying logic blocks in a synthesized logic design that have specified inputs Physics 0 Active
US8612909B1 Identifying logic blocks in a synthesized logic design that have specified inputs Physics 0 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.