Inventor · San Jose, CA, US

Mark Borowicz

4Patents
3h-index
12Co-inventors
40Inventor score

Filing activity: Mar 22, 2005 → Apr 28, 2008

Most-cited inventions

PatentTitleAreaCited byStatus
US7304302B1 Systems configured to reduce distortion of a resist during a metrology process and systems and methods for reducing alteration of a specimen during analysis Electricity 41 Active
US7488938B1 Charge-control method and apparatus for electron beam imaging Electricity 6 Active
US8765496B2 Methods and systems for measuring a characteristic of a substrate or preparing a substrate for analysis Electricity 3 Active
US7365321B2 Methods and systems for measuring a characteristic of a substrate or preparing a substrate for analysis Electricity 2 Expired

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.