Mervyn Wong
4Patents
4h-index
3Co-inventors
36Inventor score
Filing activity: May 9, 2001 → Jul 25, 2003
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6620682B1 | Set of three level concurrent word line bias conditions for a nor type flash memory array | Electricity | 61 | Expired |
| US6556481B1 | 3-step write operation nonvolatile semiconductor one-transistor, nor-type flash EEPROM memory cell | Physics | 60 | Expired |
| US6818491B2 | Set of three level concurrent word line bias conditions for a NOR type flash memory array | Electricity | 17 | Expired |
| US6777292B2 | Set of three level concurrent word line bias conditions for a NOR type flash memory array | Electricity | 13 | Expired |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.