Inventor · Windsor, CO, US

Nicholas Dean Lance

1Patents
1h-index
6Co-inventors
25Inventor score

Filing activity: Dec 20, 2022 → Dec 20, 2022

Most-cited inventions

PatentTitleAreaCited byStatus
US12306754B2 Method and apparatus for increasing memory level parallelism by reducing miss status holding register allocation in caches Physics 1 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.