Inventor · Paderborn, DE

Peter Stahle

1Patents
1h-index
Co-inventors
19Inventor score

Filing activity: Jun 29, 1987 → Jun 29, 1987

Most-cited inventions

PatentTitleAreaCited byStatus
US4829420A Process and circuit arrangement for addressing the memories of a plurality of data processing units in a multiple line system Physics 25 Expired

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.