Priyesh Kumar
5Patents
2h-index
15Co-inventors
37Inventor score
Filing activity: Apr 8, 2009 → Jan 18, 2013
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US8566658B2 | Low-power and area-efficient scan cell for integrated circuit testing | Physics | 5 | Active |
| US8738978B2 | Efficient wrapper cell design for scan testing of integrated | Physics | 3 | Active |
| US8898527B2 | At-speed scan testing of clock divider logic in a clock module of an integrated circuit | Physics | 1 | Active |
| US8812921B2 | Dynamic clock domain bypass for scan chains | Physics | 0 | Active |
| US10025573B2 | Extensible distribution/update architecture | Physics | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.