Ralph James
18Patents
8h-index
4Co-inventors
65Inventor score
Filing activity: Jul 31, 1985 → Oct 8, 2013
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US7222213B2 | System and method for communicating the synchronization status of memory modules during initialization of the memory modules | Physics | 44 | Expired |
| US7234070B2 | System and method for using a learning sequence to establish communications on a high-speed nonsynchronous interface in the absence of clock forwarding | Emerging Cross-Sectional Technologies | 21 | Expired |
| US7133991B2 | Method and system for capturing and bypassing memory transactions in a hub-based memory system | Physics | 19 | Expired |
| US7257683B2 | Memory arbitration system and method having an arbitration packet protocol | Physics | 17 | Expired |
| US7266633B2 | System and method for communicating the synchronization status of memory modules during initialization of the memory modules | Physics | 16 | Expired |
| US7392331B2 | System and method for transmitting data packets in a computer system having a memory hub architecture | Physics | 14 | Expired |
| US7412571B2 | Memory arbitration system and method having an arbitration packet protocol | Physics | 13 | Active |
| US7251714B2 | Method and system for capturing and bypassing memory transactions in a hub-based memory system | Physics | 10 | Expired |
| US7529273B2 | Method and system for synchronizing communications links in a hub-based memory system | Physics | 8 | Active |
| US7447240B2 | Method and system for synchronizing communications links in a hub-based memory system | Physics | 7 | Expired |
| US7461286B2 | System and method for using a learning sequence to establish communications on a high-speed nonsynchronous interface in the absence of clock forwarding | Emerging Cross-Sectional Technologies | 7 | Active |
| US4791560A | Macro level control of an activity switch in a scientific vector processor which processor requires an external executive control program | Physics | 7 | Expired |
| US8082404B2 | Memory arbitration system and method having an arbitration packet protocol | Physics | 5 | Active |
| US8346998B2 | System and method for transmitting data packets in a computer system having a memory hub architecture | Physics | 4 | Active |
| US7596641B2 | System and method for transmitting data packets in a computer system having a memory hub architecture | Physics | 1 | Active |
| US9032166B2 | Memory arbitration system and method having an arbitration packet protocol | Physics | 0 | Active |
| US7949803B2 | System and method for transmitting data packets in a computer system having a memory hub architecture | Physics | 0 | Active |
| US8555006B2 | Memory arbitration system and method having an arbitration packet protocol | Physics | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.