System and method for communicating the synchronization status of memory modules during initialization of the memory modules
US7222213B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | May 17, 2004 |
| Grant date | May 22, 2007 |
| Priority date | — |
| Expiry date | May 10, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/1684
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory system includes a memory hub controller coupled to a plurality of memory modules each of which includes a memory hub. The memory hub controller and the memory hubs each include at least one receiver that is synchronized to an internal clock signal during initialization. The memory hub controller and the memory hubs each transmit an initialization complete signal downstream when at least one receiver in the controller or hub is initialized and, in the case of the memory hubs, when a downstream initialization signal has also been received. Similarly, the memory hubs transmit an initialization signal upstream to another memory hub or the controller when both of its receivers are initialized and an upstream initialization signal has also been received. Receipt of an upstream initialization signal by the memory hub controller signifies that all of the receivers have been initialized.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.