Roberto Passerone
6Patents
6h-index
6Co-inventors
52Inventor score
Filing activity: Jun 10, 1999 → Mar 21, 2011
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US7624364B2 | Data path and placement optimization in an integrated circuit through use of sequential timing information | Physics | 36 | Active |
| US7743354B2 | Optimizing integrated circuit design through use of sequential timing information | Physics | 28 | Active |
| US8307316B2 | Reducing critical cycle delay in an integrated circuit design through use of sequential slack | Physics | 9 | Active |
| US8589845B2 | Optimizing integrated circuit design through use of sequential timing information | Physics | 9 | Active |
| US7913210B2 | Reducing critical cycle delay in an integrated circuit design through use of sequential slack | Physics | 8 | Active |
| US7136947B1 | System and method for automatically synthesizing interfaces between incompatible protocols | Physics | 7 | Expired |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.