Scott Herrington
8Patents
3h-index
17Co-inventors
54Inventor score
Filing activity: Jul 10, 1992 → Dec 16, 2019
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US7239257B1 | Hardware efficient digital control loop architecture for a power converter | Electricity | 43 | Expired |
| US6425115B1 | Area efficient delay circuits | Physics | 26 | Expired |
| US5357156A | Active clamp circuit scheme for CMOS devices | Electricity | 17 | Expired |
| US9164560B2 | Daisy chain configuration for power converters | Electricity | 3 | Active |
| US7502468B2 | Method and system for generating a cryptographically random number stream | Electricity | 1 | Active |
| US10565144B2 | Double data rate controllers and data buffers with support for multiple data widths of DRAM | Physics | 1 | Active |
| US10956349B2 | Support for multiple widths of DRAM in double data rate controllers or data buffers | Physics | 0 | Active |
| US9667064B2 | Daisy chain configuration for power converters | Electricity | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.