Srivatsan Raghavan
4Patents
1h-index
12Co-inventors
37Inventor score
Filing activity: Mar 4, 2015 → Oct 12, 2022
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US9460261B2 | Computer-implemented verification system for performing a functional verification of an integrated circuit | Physics | 1 | Active |
| US12340155B2 | Detecting instability in combinational loops in electronic circuit designs | Physics | 0 | Active |
| US12265122B1 | Memory profiler for emulation | Physics | 0 | Active |
| US11176293B1 | Method and system for emulation clock tree reduction | Physics | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.