Inventor · San Jose, CA, US

Steven Hedayati

2Patents
2h-index
3Co-inventors
27Inventor score

Filing activity: Apr 30, 2001 → Dec 4, 2001

Most-cited inventions

PatentTitleAreaCited byStatus
US6777307B1 Method of forming semiconductor structures with reduced step heights Electricity 8 Expired
US6969684B1 Method of making a planarized semiconductor structure Electricity 3 Expired

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.