Inventor · Yokkaichi, JP

Teruyuki Mine

12Patents
5h-index
18Co-inventors
59Inventor score

Filing activity: Jun 15, 2004 → Feb 13, 2017

Most-cited inventions

PatentTitleAreaCited byStatus
US9608043B2 Method of operating memory array having divided apart bit lines and partially divided bit line selector switches Physics 18 Active
US6984797B2 Push-button switch Electricity 14 Expired
US9887240B2 Method of fabricating memory array having divided apart bit lines and partially divided bit line selector switches Physics 11 Active
US9356074B1 Memory array having divided apart bit lines and partially divided bit line selector switches Physics 8 Active
US7867853B2 Method of manufacturing semiconductor device and semiconductor Fin-shaped channel Electricity 5 Active
US9012983B2 Semiconductor device and method of forming the same Electricity 3 Active
US9646880B1 Monolithic three dimensional memory arrays formed using sacrificial polysilicon pillars Electricity 3 Active
US9595568B2 Semiconductor memory device having unequal pitch vertical channel transistors employed as selection transistors and method for programming the same Electricity 2 Active
US9391120B2 Semiconductor memory device having unequal pitch vertical channel transistors used as selection transistors Electricity 1 Active
US8043903B2 Method of manufacturing semiconductor device Electricity 0 Active
US10096654B2 Three-dimensional resistive random access memory containing self-aligned memory elements Electricity 0 Active
US9177964B2 Methods of forming sidewall gates Electricity 0 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.