Semiconductor memory device having unequal pitch vertical channel transistors employed as selection transistors and method for programming the same
US9595568B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jun 13, 2016 |
| Grant date | Mar 14, 2017 |
| Priority date | — |
| Expiry date | Jun 13, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N70/8833
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor device comprises a set of selection transistors, such as in a three-dimensional memory structure or stack having resistance change memory cells arranged along vertical bit lines. Each selection transistor has a non-shared control gate and a shared control gate. The transistor bodies may have an unequal pitch and a common height. Some of the transistor bodies can be misaligned with the vertical bit lines to fit the transistors to the stack. A method for programming the three-dimensional memory structure includes forming one or two channels in a transistor body to provide a current to selected memory cells. Programming can initially use one channel and subsequently use two channels based on a programming progress. A method for fabricating a semiconductor device includes etching a gate conductor material so that shared and non-shared control gates have a common height.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.