Inventor · Pittsburgh, PA, US

Thiago Hersan

1Patents
1h-index
5Co-inventors
25Inventor score

Filing activity: Jan 3, 2008 → Jan 3, 2008

Most-cited inventions

PatentTitleAreaCited byStatus
US7827516B1 Method and system for grouping logic in an integrated circuit design to minimize number of transistors and number of unique geometry patterns Physics 1 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.