Thy Tran
3Patents
1h-index
7Co-inventors
37Inventor score
Filing activity: Aug 29, 1997 → Oct 9, 2013
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US5851927A | Method of forming a semiconductor device by DUV resist patterning | Electricity | 14 | Expired |
| US8580690B2 | Process of planarizing a wafer with a large step height and/or surface area features | Electricity | 1 | Active |
| US8871103B2 | Process of planarizing a wafer with a large step height and/or surface area features | Electricity | 1 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.